Product Summary
The DS90LV110ATMT is a 1 to 10 data/clock distributor utilizing LVDS(Low Voltage Differential Signaling) technology for low power, high speed operation. The DS90LV110ATMT can be used as a high speed differential 1 to 10 signal distribution / fanout replacing multi-drop bus applications for higher speed links with improved signal quality. It can also be used for clock distribution up to 200MHz. The DS90LV110ATMT accepts LVDS signal levels, LVPECL levels directly or PECL with attenuation networks.
Parametrics
DS90LV110ATMT absolute maximum ratings: (1)Supply Voltage (VDD-VSS):-0.3V to +4V; (2)LVCMOS/LVTTL Input Voltage(EN):-0.3V to (VCC + 0.3V); (3)LVDS Receiver Input Voltage(IN+, IN-):-0.3V to +4V; (4)LVDS Driver Output Voltage(OUT+, OUT-):-0.3V to +4V; (5)Junction Temperature:+150℃; (6)Storage Temperature Range:-65℃ to +150℃; (7)Lead Temperature(Soldering, 4 sec.):+260℃.
Features
DS90LV110ATMT features: (1)Low jitter 400 Mbps fully differential data path; (2)145 ps (typ) of pk-pk jitter with PRBS = 223?1 data pattern at 400 Mbps; (3)Single +3.3 V Supply; (4)Balanced output impedance; (5)Output channel-to-channel skew is 35ps (typ); (6)Differential output voltage (VOD) is 320mV (typ) with; (7)100Ω termination load; (8)LVDS receiver inputs accept LVPECL signals; (9)LVDS input failsafe; (10)Fast propagation delay of 2.8 ns (typ); (11)Receiver open, shorted, and terminated input failsafe; (12)28 lead TSSOP package; (13)Conforms to ANSI/TIA/EIA-644 LVDS standard.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
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DS90LV110ATMT |
National Semiconductor (TI) |
LVDS Interface IC |
Data Sheet |
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DS90LV110ATMT/NOPB |
National Semiconductor (TI) |
LVDS Interface IC |
Data Sheet |
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DS90LV110ATMTX/NOPB |
National Semiconductor (TI) |
LVDS Interface IC |
Data Sheet |
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DS90LV110ATMTX |
National Semiconductor (TI) |
LVDS Interface IC |
Data Sheet |
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