DS90C385AMT

Product Summary

The DS90C385AMT is a 3.3V Programmable LVDS Transmitter. It converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. The DS90C385AMT can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe FPDLink Receiver without any translation logic. The DS90C385AMT is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces with added Spread Spectrum Clocking support.

Parametrics

DS90C385AMT absolute maximum ratings: (1)Supply Voltage (VCC):-0.3V to +4V; (2)CMOS/TTL Input Voltage:-0.5V to (VCC + 0.3V); (3)LVDS Driver Output Voltage:-0.3V to (VCC + 0.3V); (4)LVDS Output Short Circuit: Duration:Continuous; (5)Junction Temperature:+150℃; (6)Storage Temperature:-65℃ to +150℃; (7)Lead Temperature(Soldering, 4 sec):+260℃.

Features

DS90C385AMT features: (1)Pin-to-pin compatible to DS90C383, DS90C383A and DS90C385; (2)No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered; (3)Support Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% center spread or -5% down spread; (4)“Input Clock Detection” feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high; (5)18 to 87.5 MHz shift clock support; (6)Tx power consumption < 147 mW (typ) @ 87.5 MHz Grayscale; (7)Tx Power-down mode < 60 μW (typ); (8)Supports VGA, SVGA, XGA, SXGA(dual pixel), SXGA+(dual pixel), UXGA(dual pixel); (9)Narrow bus reduces cable size and cost; (10)Up to 2.45 Gbps throughput; (11)Up to 306.25Megabytes/sec bandwidth; (12)345 mV (typ) swing LVDS devices for low EMI; (13)PLL requires no external components; (14)Compliant to TIA/EIA-644 LVDS standard; (15)Low profile 56-lead TSSOP package.

Diagrams